This invention relates to methods and apparatuses for alignment of objects, and relates in particular to alignment techniques for use in lithography in the manufacture of semiconductor devices.
In the manufacture of semiconductor devices, a large number of patterning steps are carried out in the formation of complex, multi-layer structures. Each patterning step is carried out through lithographic techniques, involving exposure of selected portions of a resist to particles or light. In the fabrication of such multi-layer structures, it is extremely important that each pattern layer be aligned or in registration with, other layers in the structure. Mistakes in alignment or registration will result in unusable structures.
Conventionally, registration is accomplished by optically locating alignment marks on the surface of a wafer. For example, a low energy laser beam may be projected on such an alignment mark on the wafer surface. Analysis of the reflected image then indicates the position of the lithographic system with respect to the alignment mark. The accuracy of optical alignment techniques is limited due to the limited resolution of light beams.
Objects of the invention will become evident from the detailed description of a preferred embodiment which follows.